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[VHDL-FPGA-Verilog] vhdl程序例子

Description: vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
Platform: | Size: 168960 | Author: 王力 | Hits:

[Embeded-SCM Develop] 1549

Description: ad采集程序，已经经过仿真验证，能够直接应用-ad collection procedure has been verified through simulation, to the direct application
Platform: | Size: 1024 | Author: xuying | Hits:

[VHDL-FPGA-Verilog] arith_lib_cadence

Description: Cadence的VHDL运算库包，实现求方根，平方你是不是以前不知道怎么弄．哈哈．-Cadence VHDL Operational the package, seeking to achieve root, You are not square did not know how get. Ha ha.
Platform: | Size: 81920 | Author: 喻袁洲 | Hits:

[VHDL-FPGA-Verilog] vhdl_ad0809_arm

Description: 本程序是用VHDL语言写的，包括AD0809，双口RAM等程序。已经调试过-this program is written in VHDL, including the AD0809, dual-port RAM, and other procedures. Debugging has been too
Platform: | Size: 4096 | Author: lm | Hits:

[SCM] 0809conventorvhdl

Description: 1.AD0809转换器的vhdl实现 2.用状态机来实现不同状态的动态切换，思路明晰简单实现。 3.内含注释，易于修改和理解 4.对数码管的动态扫描,显示 -1.AD0809 converters to achieve the two vhdl. Using the state machine to achieve the different states of dynamic switching thinking, clarity simple to achieve. 3. Notes intron and easy to understand and 4. Digital control of the dynamic scan showed
Platform: | Size: 1024 | Author: 方周 | Hits:

[VHDL-FPGA-Verilog] ADC0809VHDL

Description: VHDL语言编写的程序，实现控制ADC0809的工作 -VHDL prepared by the procedures, the control Connection between ADC 0809
Platform: | Size: 4096 | Author: wang | Hits:

[VHDL-FPGA-Verilog] adc0809

Description: VHDL编写的ADC0809 控制器，经过验证没有错误-VHDL prepared ADC0809 controller, no errors verified
Platform: | Size: 1024 | Author: 王攀 | Hits:

[Software Engineering] chengxu

Description: ad转换的程序，c8051f021老程序，18B20测温00，抢答器程序，pwm_pac.c。-ad conversion process, c8051f021 old procedures, 18B20 temperature 00, Answer program, pwm_pac.c.
Platform: | Size: 3065856 | Author: Liang | Hits:

[VHDL-FPGA-Verilog] adc

Description: Analog-to-Digital Converter，VHDL code-Analog-to-Digital Converter, VHDL code
Platform: | Size: 14336 | Author: leigh lee | Hits:

[Embeded-SCM Develop] ADS8361

Description: TI公司的AD8361的VHDL控制程序，可实现CPLD的采集。-TI s AD8361 the VHDL control procedures, the acquisition can be realized CPLD.
Platform: | Size: 1024 | Author: 祝箭 | Hits:

[VHDL-FPGA-Verilog] ads7844

Description: 本源码介绍了ADS7844 AD转换芯片的VHDL控制器。-The source of the introduction ADS7844 AD conversion of the VHDL controller chip.
Platform: | Size: 1386496 | Author: 周生 | Hits:

[VHDL-FPGA-Verilog] AD9826.vhd

Description: 驱动AD9826的VHDL程序，经测试可以成功驱动-AD9826 driver of VHDL procedures, have been tested successfully drive
Platform: | Size: 1024 | Author: wuchao | Hits:

[VHDL-FPGA-Verilog] xapp355

Description: Serial ADC Interface write in VHDL based on xilinx cpld
Platform: | Size: 33792 | Author: jiang | Hits:

[File Format] ram_da

Description: 将AD转换得到的八位数据存入RAM，存1000个点，然后通过串行DA读出，DA芯片为TLV5638,AD芯片为tlc0820ac，RAM为FM25L16-AD conversion will be the eight data into RAM, keep 1000 points, and then read out through the DA serial, DA chips for the TLV5638, AD chips for tlc0820ac, RAM for FM25L16
Platform: | Size: 650240 | Author: 王力 | Hits:

[Other] a2d2

Description: ad取样，经由cpld处理，存入ram 1000点并由串行的da进行还原-ad sampling, by the CPLD deal, deposited by the serial ram 1000 points to restore the da
Platform: | Size: 180224 | Author: | Hits:

[VHDL-FPGA-Verilog] ADC0809_VHDL_ctrl

Description: VHDL控制ADC0809芯片，实现AD转化及采集后数据的读写。-VHDL control ADC0809 chip realize after AD conversion and acquisition of reading and writing data.
Platform: | Size: 4096 | Author: zhou129 | Hits:

[Algorithm] AD

Description: 用于AD转换的 ，is very good for you -For AD conversion, is very good for you
Platform: | Size: 493568 | Author: fei | Hits:

[Compress-Decompress algrithms] STCApplication

Description: sTC系列单片机内部AD的应用 STC89LE52AD、54AD、58AD、516AD这几款89系列的STC单片机内部自带有8路8位的AD转换器，分布在P1口的8位上，当时钟在40MHz以下时，每17个机器周期可完成一次AD转换。 -STC series single-chip internal AD Application STC89LE52AD, 54AD, 58AD, 516AD that several 89 series of STC has its own single-chip 8-way internal 8-bit AD converter, the distribution of P1 at the mouth of 8 on, when the bell At 40MHz below, every 17 machine cycles to be completed by an AD converter.
Platform: | Size: 2048 | Author: 力伟 | Hits:

[VHDL-FPGA-Verilog] AD-Based_on_FPGA

Description: 使用VHDL语言编写的A/D转换程序，可在FPGA平台使用-VHDL language used A/D conversion process can be used in the FPGA platform
Platform: | Size: 58368 | Author: 东风 | Hits:

[VHDL-FPGA-Verilog] AD

Description: 用硬件语言VHDL编写AD采集系统，经过仿真结果正确-Hardware language VHDL with the preparation of AD acquisition system, after a simulation result is correct
Platform: | Size: 159744 | Author: 王岩嵩 | Hits:
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